The CD4022 is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical ??1?? on their reset line.

CD4023 NAND gate provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

CD4027 is a single monolithic chip integrated circuit containing two identical complementary-symmetry J-K master-slave flip-flops. Each flip-flop has provisions for individual J, K, Set, Reset, and Clock input signals.

CD4028 types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding-logic gates, and 10 output buffers. A BCD code applied to the four input, A to D, results in a high level at the selected one of 10 decimal decoded outputs.

CD4033 consist of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a numerical display.

CD4034 is a static eight-stage parallel-or serial-input parallel-output register. It can be used to:1) bidirectionally transfer parallel information between two buses, 2) convert serial data to parallel form and direct the parallel data to either of two buses