Showing 541–552 of 3972 results

74LS245 3-State Octal Bus Transceiver IC (74245 IC) DIP-20 Package

38.00
The 74LS245 octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements.

74LS27 Triple 3-input NOR Gate IC (7427 IC) DIP-14 Package

14.00
The 74LS27?contains three independent 3-input AND gates. The 74LS27 is characterized for operation from 0 ?C? to 70 ?C.?The 74LS27 features is package Options include Plastic "small outline" packages, ceramic chips carriers and flat packages and plastic and ceramic DIPs.

74LS27 Triple 3-input NOR Gate IC (7427 IC) DIP-14 Package (Copy)

14.00
The 74LS27?contains three independent 3-input AND gates. The 74LS27 is characterized for operation from 0 ?C? to 70 ?C.?The 74LS27 features is package Options include Plastic "small outline" packages, ceramic chips carriers and flat packages and plastic and ceramic DIPs.

74LS32 Quad 2-Input OR Gate IC (7432 IC) DIP-14 Package

19.00
The 74LS32 is a 14 Pin Quad 2-Input OR Gate IC.?The 74LS32 provides four independent 2-input OR gates?with standard push-pull outputs. The device is designed for operation?with a power supply range of 2.0V to 6.0V.??

74LS47 BCD to 7-Segment Decoder/Driver IC (7447 IC) DIP-16 Package

43.00
The 74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segments directly.

74LS73 Dual JK Flip-Flop with Clear IC (7473 IC) DIP-14 Package

61.00
The 74LS73 device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse.

74LS74 Dual D-type Positive Edge-triggered Flip-Flops IC (7474 IC) DIP-14 Package

20.00
The 74LS74 device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse.

74LS76 Dual JK Flip-Flop with Set and Clear IC7476

60.00

IC7476 jk flip flop

SN7476?is a?dual in-line JK flip flop IC, i.e. it has two JK flip flops inside it and each can be used individually based on our application. The term JK flip flop comes after its inventor Jack Kilby. The JK flip flops are considered to be the most efficient flip-flop and can be used for certain applications on its own. The flip-flops are also called as latching devices meaning it can remember one single bit of data and latch the output based on it, due to this property they are commonly used as shift registers, control registers, storage registers or where ever a small memory is required. More than one Flip Flop can be used in series to act as an EEPROM for holding small amount of data. The JK flip flop is considered to be more suitable for practical application because of its truth table that is the output of the flip flop will be stable for all types of inputs. 7476 IC Datasheet

74LS83 4-Bit Binary Full Adder IC

60.00

IC 7483 4-Bit Binary Adder IC

74LS83 designed as a high-speed 4-bit fuller Adder IC featuring carry out function. The IC has four independent stages of full adder circuits during a single package. It?s commonly utilized in applications where arithmetic operations are involved. Although today we?ve cheap microcontrollers that would perform all arithmetic operations required for our application, in period of time the ICs like Adder, Counter, flip-flops etc were used for same. In this manner the complexity and therefore the BOM cost of the circuit design will greatly go low. 74LS83 may be a Full Adder with Carry in and perform feature. It?s a four-stage 4-bit counter, meaning it?s four individual Full adder circuits each of 4-bit inside one package. It also can be easily cascaded if quite four stages are required. These full adders perform the addition of two 4-bit binary numbers. The sum (?) outputs provided for every bit and therefore the resultant carry (C4) obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This gives the system designer a partial lookahead performance at the economy and a lower package count when using ripple-carry. Because the adder logic, including the carry, is implemented in its actual form, end-around carries are frequently achieved without the need of logic or level inversion. The 74LS83 multiplies the input carry by two 4-bit binary words (A and B). On the sum outputs (1?4) and outgoing carry (C4) outputs, the binary sum shows. 74LS83 Datasheet