PCF85163D
Nearly any Liquid Crystal Display (LCD)1 with modest multiplex rates may be interfaced with the PCF85162 peripheral device. Any static or multiplexed LCD with up to four backplanes and up to 32 segments can have its driving signals generated by this device. For bigger LCD applications, it is simply cascaded. The two-line bidirectional I2 C-bus is used by the PCF85162 for communication with the majority of microcontrollers. A display RAM with auto-incremented addressing, hardware sub addressing, and display memory switching (static and duplex drive modes) all reduce communication overheads.
Features
LCD controller and driver on a single chip
Selectable display bias configuration: static, 12, or 13; Internal LCD bias generation with voltage-follower buffers; Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing; 32 segment drives:
Up to 8 14-segment alphanumeric characters, up to 16 7-segment numeric characters, and up to 128 components of any image
For storing display data, use 32 bits of RAM.
Flexible flashing modes; switching between display memory banks in static and duplex driving modes; and independent supply for LCD and logic voltage
Broad power supply range: 1.8 to 5.5 volts
PCF8563T
The PCF8563 is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power
consumption. A programmable clock output, interrupt output, and voltage-low detector are
also provided. All addresses and data are transferred serially via a two-line bidirectional
I
2C-bus. Maximum bus speed is 400 kbit/s. The register address is incremented
automatically after each written or read data byte.
PCF8584T
The PCF8584 is an integrated circuit designed in CMOS
technology which serves as an interface between most
standard parallel-bus microcontrollers/microprocessors
and the serial I2C-bus. The PCF8584 provides both master
and slave functions.
Communication with the I2C-bus is carried out on a
byte-wise basis using interrupt or polled handshake.
It controls all the I2C-bus specific sequences, protocol,
arbitration and timing. The PCF8584 allows parallel-bus
systems to communicate bidirectionally with the I2C-bus.
PCF8593T
The PCF8593 is a CMOS1 clock and calendar circuit, optimized for low power
consumption. Addresses and data are transferred serially via the two-line bidirectional
2C-bus. The built-in word address register is incremented automatically after each written
or read data byte. The built-in 32.768 kHz oscillator circuit and the first 8 bytes of the RAM
are used for the clock, calendar, and counter functions. The next 8 bytes can be
programmed as alarm registers or used as free RAM space.
