? Improved Connectivity (Additional Feedback Routing, Alternate Input Routing) ? Output Enable Product Terms ? Transparent ? Latch Mode ? Combinatorial Output with Registered Feedback within Any Macrocell ? Three Global Clock Pins ? ITD (Input Transition Detection) Circuits on Global Clocks, Inputs, and I/O ? Fast Registered Input from Product Term ? Programmable ?Pin-keeper? Option ? VCC Power-up Reset Option ? Pull-up Option on JTAG Pins TMS and TDI ? Advanced Power Management Features ? Edge-controlled Power-down ?L? ? Individual Macrocell Power Option ? Disable ITD on Global Clocks, Inputs, and I/O