AT25640B-SSHL-T
₹150.00
The Serial Electrically-Erasable Programmable Read-Only Memory (EEPROM) on the Atmel? AT25320B/640B has 32,768-/65,536-bits and is divided into 4,096/8,192 words with 8 bits each. The device is prepared for usage in a wide range of industrial and commercial settings where moderate and low-voltage functioning are critical requirements. The 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead UDFN, 8-lead XDFN, and 8-ball VFBGA packages for the AT25320B/640B are available in compact sizes. A 3-wire interface made up of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock is used to access and enable the AT25320B/640B. (SCK). No further erase cycle is necessary before Write since every programming cycle is fully self-timed. Programming one of the four blocks of write security into the status register activates block write protection. For added data security, separate instructions for programme enable and programme disable are given. The WP pin offers hardware data protection to guard against unintentional write attempts to the status register. Any serial communication can be halted using the HOLD pin without having to restart the serial sequence.
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24C32 32K bit
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Features:-
? Operating voltage range: 4.5V to 5.5V - Maximum read current: 150 A at 5.5V - Peak write current: 3mA at 5.5V - Typical standby current: 1 A
? I2C compliant, industry-standard two-wire bus protocol with 100 kHz and 400 kHz modes
? Autonomous write cycle (including auto-erase)
? Switchable circuitry for data protection
? High Endurance Block has a guaranteed 10,000,000 Erase/Write cycles. - Guaranteed 1,000,000 E/W cycles for Standard Endurance Block
? Available in 8 byte page or byte modes.
? A 64-byte input cache with 1 page by 8 lines for quick write loads.
? Schmitt trigger with filtered inputs to reduce noise
? Ground bounce elimination by output slope control
? A typical write cycle time, byte or page, of 2 ms
? A single bus may support up to 8 chips and 256K bits of total memory.
? Protection from electrostatic discharge > 4000V
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? PDIP/SOIC 8-pin packages
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24LC512-I/SN
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Features:
? A single supply that operates 24AA512 and 24FC512 devices at 1.7V and 24LC512 devices at 2.5V.
? CMOS Low-Power Technology:
- A average active current of 400 uA
- Typical standby current is 100 nA
? Compatible with 2-Wire Serial Interface and I2CTM
? Up to eight devices can be cascaded
? Noise-cancelling Schmitt Trigger Inputs
? Ground Bounce is eliminated through output slope control.
? Compatibility of 100 kHz and 400 kHz clocks
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? Timed Erase/Write Cycle on Your Own
? Page Write Buffer of 128 bytes
Equipment Write-Protect
? >4000V ESD Protection
? Over 1,000,000 Erase/Write Cycles
? 200 years of data retention
? The following packages are available: 8-lead PDIP, SOIJ, SOIC, BTSSOP, DFN, Chip Scale, and 14-lead TSSOP.
? RoHS and Pb-Free Compliant
? Ranges of temperatures
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Features
? CMOS Low-Power Technology:
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- Typical standby current: 500 nA
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? 32 bytes each page
? Maximum Write Cycle Time: 5 ms
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? Integrated Write Protection:
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? Latch for write enable
- A write-protection pin
? Read in Sequence
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AT24C512C-SSHD Datasheet
AT24CO2
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Features
Low and Standard Voltage Operation: 2.7 (VCC = 2.7 to 5.5 V) and 1.8 (VCC = 1.8 to 5.5 V)
?128 x 8, 256 x 8, 512 x 8, 1024 x 8, or 2048 x 8 internal organisation (16K)
Bidirectional Data Transfer Protocol, Schmidt Trigger, Filtered Inputs for Noise Suppression, Two-wire Serial Interface, and Compatibility at 100 kHz (1.8V) and 400 kHz (2.7V, 5V)
8-byte page (1K, 2K), 16-byte page, Write Protect Pin for Hardware Data Protection (4K, 8K, 16K) Writing Styles
?High-reliability? Endurance: 1 Million Write Cycles? Data Retention: 100 Years ?Partial Page Writes Allowed ?Self-timed Write Cycle (5 ms max)
?Automotive Grade and Lead-free/Halogen-free Devices Available
?5-lead SOT23,8-lead TSSOP,8-lead PDIP,8-lead JEDEC SOIC,8-lead MAP, and 8-ball dBGA2 Packages
?Die Sales: Bumped Wafers, Waffle Packs, and Wafer Forms
HT9200A
The HT9200A/B tone generators are intended for use with C interfaces. aC can direct them to generate 16 dual tones and 8 single tones using the DTMF pin. The HT9200A has a serial mode, but the HT9200B has a selectable serial/parallel mode interface for a variety of applications such as surveillance systems, building automation, navigation system through telephone lines, communication systems, and so on.
M24128-DRDW8TP/K
Features? of M24128-DRD
- Support for all I2C bus modes? 1 MHz/ 400 kHz/ 100 kHz
- Memory bank- An EEPROM with 128 Kbits (16 Kbytes)
- Page Size in Bytes: 64
- In addition Make a locked page.
- Wider range of temperatures and voltages?40 to 105 degrees Celsius; 1.7 to 5.5 volts
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- SMD/SMT mounting style
- Case/Package: TSSOP-8
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- 40 C for the minimum operating temperature
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- Retention of Data: 200 Years
- Maximum Supply Current: 2 mA
- The M24128-DRD series
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- Packaging: Cut Tape and Reel
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W25Q16JV-SSIQ
Features of W25Q16JVSSIQ
- SpiFlash Memories' New Family - 16M-bit/ 2M-byte W25Q16JV - Common SPI: CLK, /CS, DI, and DO - CLK, /CS, IO0, IO1 and Dual SPI - CLK, /CS, IO0, IO1, IO2, IO3 for Quad SPI. - Hardware and Software Reset
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- Wide temperature range, low power - Single 2.7 to 3.6 volt supply - Operating range: -40 to +85 ?C. - Operating temperature range: -40 to +105 ?C. - Power-down, 1A.
- 4KB sectors and flexible architecture - 4K/32K/64K-Byte Uniform Sector/Block Erase - Programmable pages can hold up to 256 bytes. - Delete/Suspend/Resume Program
- Features of Advanced Security - Write-Protect in Software and Hardware - Lock-Down Power Supply and - Extraordinary OTP security - Protection for the top/bottom and complement arrays - Protection for individual blocks and sectors - Each device has a 64-Bit unique ID. - Register for Discoverable Parameters (SFDP) - OTP locks on 3X256-Byte Security Registers - Bits in the Volatile & Non-Volatile Status Register
- Effective Packaging for Space - 8-pin SOIC 150/208 mils - USON 8-pad 2X3mm/4X3mm - XSON 8-pad 4x4-mm - WSON 8-pad 6x5-mm ? 8-ball WLCSP - For KGD and additional alternatives, contact Winbond
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