Showing 805–816 of 1714 results

LTC1040CSW#DPR

627.00
The LTC? 1040 is a monolithic CMOS dual comparator manufactured using Linear Technology?s enhanced LTCMOSTM silicon gate process. Extremely low operating power levels are achieved by internally switching the comparator ON for short periods of time. The CMOS output logic holds the output information continuously while not consuming any power. In addition to switching power ON, a switched output is provided to drive external loads during the comparator?s active time. This allows not only low comparator power, but low total system power.

LTC1051CN8

906.00
The LTC? 1051/LTC1053 are high performance, low cost dual/quad zero-drift operational amplifiers. The unique achievement of the LTC1051/LTC1053 is that they integrate on chip the sample-and-hold capacitors usually required externally by other chopper amplifiers. Further, the LTC1051/LTC1053 offer better combined overall DC and AC performance than is available from other chopper stabilized amplifiers with or without internal sample/hold capacitors. The LTC1051/LTC1053 have an offset voltage of 0.5?V, drift of 0.01?V/?C, DC to 10Hz, input noise voltage typically 1.5?VP-P and typical voltage gain of 140dB. The slew rate of 4V/?s and gain bandwidth product of 2.5MHz are achieved with only 1mA of supply current per op amp

LTC1487CS8

371.00
The LTC? 1487 is an ultra-low power differential line transceiver designed with high impedance inputs allowing up to 256 transceivers to share a single bus. It meets the requirements of RS485 and RS422. The LTC1487 features output drivers with controlled slew rate, decreasing the EMI radiated from the RS485 lines, and improving signal fidelity with misterminated lines. The CMOS design offers significant power savings without sacrificing ruggedness against overload or ESD damage. Typical quiescent current is only 80?A while operating and 1?A in shutdown

LTC1755EGN

371.00
The LTC? 1487 is an ultra-low power differential line transceiver designed with high impedance inputs allowing up to 256 transceivers to share a single bus. It meets the requirements of RS485 and RS422. The LTC1487 features output drivers with controlled slew rate, decreasing the EMI radiated from the RS485 lines, and improving signal fidelity with misterminated lines. The CMOS design offers significant power savings without sacrificing ruggedness against overload or ESD damage. Typical quiescent current is only 80?A while operating and 1?A in shutdown.

LTC491CS

584.00
The LTC? 491 is a low power differential bus/line transceiver designed for multipoint data transmission standard RS485 applications with extended common mode range (12V to ?7V). It also meets the requirements of RS422. The CMOS design offers significant power savings over its bipolar counterpart without sacrificing ruggedness against overload or ESD damage. The driver and receiver feature three-state outputs, with the driver outputs maintaining high impedance over the entire common mode range. Excessive power dissipation caused by bus contention or faults is prevented by a thermal shutdown circuit which forces the driver outputs into a high impedance state. The receiver has a fail safe feature which guarantees a high output state when the inputs are left open. Both AC and DC specifications are guaranteed from 0?C to 70?C and 4.75V to 5.25V supply voltage range.

M24C32-WMN6

20.00
The M24C32 is a 32-Kbit I2C-compatible EEPROM (Electrically Erasable PROgrammable Memory) organized as 4 K ? 8 bits. The M24C32-W can operate with a supply voltage from 2.5 V to 5.5 V, the M24C32-R can operate with a supply voltage from 1.8 V to 5.5 V, and the M24C32-F and M24C32-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 ?C / 85 ?C; while the M24C32-X can operate with a supply voltage from 1.6 V to 5.5 V over an ambient temperature range of -20 ?C / 85 ?C. The M24C32-D offers an additional page, named the Identification Page (32 byte). The Identification Page can be used to store sensitive application parameters which can be (later) permanently locked in Read-only mode.