DS2181AQ
The DS2181A is designed for use in CEPT networks and supports all logical requirements of CCITT Red
Book Recommendations G.704, G.706 and G.732. The transmit side generates framing patterns and
CRC4 codes, formats outgoing channel and signaling data, and produces network alarm codes when
enabled. The receive side decodes the incoming data and establishes frame, CAS multiframe, and CR
DS2480B
The DS2480B is a serial port to 1-Wire interface chip that supports standard and overdrive speeds. It connects directly to UARTs and 5V RS232 systems. Interfacing to RS232C (?12V levels) requires a passive
clamping circuit and one 5V to ?12V level translator. Internal timers relieve the host of the burden of
generating the time-critical 1-Wire communication waveforms
DS26C31MJ/883Q
DESCRIPTION
The DS26C31 is a quad differential line driver 2? TTL Input Compatible
designed for digital data transmission over balanced
? Outputs Will Not Load Line When VCC = 0V lines. The DS26C31 meets all the requirements of
? Meets the Requirements of EIA Standard RS- EIA standard RS-422 while retaining the low power
422 characteristics of CMOS. The DS26C31 is compatible
with EIA standard RS-422; however, one exception in ? Operation from Single 5V Supply
test methodology is taken. This enables the
? TRI-STATE Outputs for Connection to System construction of serial and terminal interfaces while
Buses maintaining minimal power consumption
DS80C320 ECL
The DS80C320/DS80C323 are pin compatible with all three packages of the standard 80C32 and offer
the same timer/counters, serial port, and I/O ports. In short, the devices are extremely familiar to 8051
users, but provide the speed of a 16-bit processor.
The DS80C320 provides several extras in addition to greater speed. These include a second full hardware
serial port, seven additional interrupts, programmable watchdog timer, power-fail interrupt and reset. The
device also provides dual data pointers (DPTRs) to speed block data memory moves. It can also adjust the
speed of off-chip data memory access to between two and nine machine cycles for flexibility in selecting
memory and peripherals.
DS8921M
12-ns Typical Propagation Delay
differential line driver and receiver pairs designed
? Output Skew: 0.5 ns Typical specifically for applications meeting the ST506,
? Meets the Requirements of EIA Standard RS-422 ST412, and ESDI disk drive standards. In addition,
? Complementary Driver Outputs these devices meet the requirements of the EIA
standard RS-422.
? High Differential or Common-Mode Input Voltage
Ranges of ?7 V The DS8921x receivers offer an input sensitivity of
200 mV over a ?7 V common mode operating range. ? ?0.2 V Receiver Sensitivity Over the Input Voltage
Hysteresis is incorporated (typically 70 mV) to Range improve noise margin for slowly changing input
? Receiver Input Hysteresis: 70 mV Typical waveforms.
? DS8921AT Industrial Temperature Operation: The DS8921x drivers are designed to provide (?40?C to 85?C)
DS90C032TM
The DS90C032 is a quad CMOS differential line ? Single Event Latchup (SEL) Immune 120 MeVreceiver designed for applications requiring ultra low cm2
/mg
power dissipation and high data rates.
? High Impedance LVDS Inputs with Power-Off.
The DS90C032 accepts low voltage differential input ? Accepts Small Swing (330 mV) Differential signals and translates them to CMOS (TTL Signal Levels compatible) output levels. The receiver supports a
? Low Power Dissipation TRI-STATE function that may be used to multiplex
? Low Differential Skew outputs. The receiver also supports OPEN Failsafe
and terminated (100?) input Failsafe with the addition ? Low Chip to Chip Skew of external failsafe biasing. Receiver output will be
? Pin Compatible with DS26C32A HIGH for both Failsafe conditions.
